Result Details:

Result Details
HDMIAutomationConfigTiming 97Test Frequency(MHz)148.500Upper Threshold(%)80.000Lower Threshold(%)20.000VTop(V)436 mVBase(V)-416 mUpper Threshold(V)266 mLower Threshold(V)-246 m# Edges59.400000 kAcquisition Bandwidth (GHz)13.000

Trial 1

Trial 1: Raw Clock Transition Time

HF1-2: Clock Fall Time Reference: Test ID HF1-2

Test Summary: Pass Test Description: 2 Channels Connection Model: The transition time is defined as the time interval between the normalized 20% and 80% amplitude levels. For compliance, the DUT should output the highest supported pixel clock frequency during the test.
Pass Limits:>= 75.000 psRaw Clock Transition Time215.831 ps

Result Details:

Trial 1

Trial 1: Raw Clock Transition Time

HF1-6: Clock Duty Cycle(Minimum) Reference: Test ID HF1-6

Test Summary: Pass Test Description: Confirm that the duty cycle of the differential TMDS clock does not exceed the limits allowed by the specification. For compliance, the DUT should output the highest supported pixel clock frequency during the test.
Pass Limits:>=40%Clock Duty Cycle Minimum (Worst of 2 Trials)49.780 # Trials Run: 2Worst Trial: Trial 1

Result Details:

Overall Summary + details of 2 worst trials

Pass	Trial	Actual Value	Margin	HDMIAutomationConfig	Test Frequency(MHz)	# Edges	TdutyMIN(ns)
	Avg	49.85	24.61 %
	StdDev	91.92 m	229.8 m%
	Range	130.0 m	325.0 m%
	Min	49.78	24.45 %
	Max	49.91	24.78 %
	Sum	99.69	49.23 %
	Trial 1 (Worst)	49.780	24.5%	Timing 97	148.500	10.000000 k	3.352
	Trial 2	49.910	24.8%	Timing 97_30_420	92.812	10.000000 k	5.378

Trial 1

Trial 1: Clock Duty Cycle Minimum

Trial 2

Trial 2: Clock Duty Cycle Minimum

HF1-6: Clock Duty Cycle(Maximum) Reference: Test ID HF1-6

Test Summary: Pass Test Description: Confirm that the duty cycle of the differential TMDS clock does not exceed the limits allowed by the specification. For compliance, the DUT should output the highest supported pixel clock frequency during the test.
Pass Limits:<=60%Clock Duty Cycle Maximum (Worst of 2 Trials)50.540 # Trials Run: 2Worst Trial: Trial 1

Result Details:

Overall Summary + details of 2 worst trials

Pass	Trial	Actual Value	Margin	HDMIAutomationConfig	Test Frequency(MHz)	# Edges	TdutyMAX(ns)
	Avg	50.39	16.02 %
	StdDev	212.1 m	353.6 m%
	Range	300.0 m	500.0 m%
	Min	50.24	15.77 %
	Max	50.54	16.27 %
	Sum	100.8	32.03 %
	Trial 1 (Worst)	50.540	15.8%	Timing 97	148.500	10.000000 k	3.403
	Trial 2	50.240	16.3%	Timing 97_30_420	92.812	10.000000 k	5.413

Trial 1

Trial 1: Clock Duty Cycle Maximum

Trial 2

Trial 2: Clock Duty Cycle Maximum

HF1-6: Clock Rate Reference: Test ID HF1-6

Test Summary: Pass Test Description: Confirm that the duty cycle of the differential TMDS clock does not exceed the limits allowed by the specification. For compliance, the DUT should output the highest supported pixel clock frequency during the test.
Pass Limits:[85.000000000 MHz to 150.000000000 MHz]Clock Rate (Worst of 2 Trials)148.500100000 MHz # Trials Run: 2Worst Trial: Trial 1

Result Details:

Overall Summary + details of 2 worst trials

Pass	Trial	Actual Value	Margin	HDMIAutomationConfig
	Avg	120.7 MHz	7.163 %
	StdDev	39.38 MHz	6.867 %
	Range	55.69 MHz	9.712 %
	Min	92.81 MHz	2.308 %
	Max	148.5 MHz	12.02 %
	Sum	241.3 MHz	14.33 %
	Trial 1 (Worst)	148.500100000 MHz	2.3%	Timing 97
	Trial 2	92.812470000 MHz	12.0%	Timing 97_30_420

HF1-1: VL Clock + Reference: Test ID HF1-1

Test Summary: Pass Test Description: Confirm that the DC voltage levels on the HDMI link are within the specified limits for each TMDS signal.
Pass Limits:[2.300 V to 3.100 V]VL2.962 V

Result Details:

Result Details
HDMIAutomationConfigTiming 97_30_420Test Frequency92.813 MHz# Edges37.006000 kVH3.298 VVL(See image)VH(See image)

Trial 1

Trial 1: VL

Trial 1: VH

HF1-1:Clock + VSwing Reference: Test ID HF1-1

Test Summary: Pass Test Description: Confirm that the DC voltage levels on the HDMI link are within the specified limits for each TMDS signal.
Pass Limits:[200 mV to 600 mV]VSwing336 mV

Result Details:

Result Details
HDMIAutomationConfigTiming 97_30_420

Next

HF1-1: VL Clock - Reference: Test ID HF1-1

Test Summary: Pass Test Description: Confirm that the DC voltage levels on the HDMI link are within the specified limits for each TMDS signal.
Pass Limits:[2.300 V to 3.100 V]VL2.972 V

Result Details:

Result Details
HDMIAutomationConfigTiming 97_30_420Test Frequency92.813 MHz# Edges37.006000 kVH3.304 VVL(See image)VH(See image)

Trial 1

Trial 1: VL

Trial 1: VH

HF1-1:Clock - VSwing Reference: Test ID HF1-1

Test Summary: Pass Test Description: Confirm that the DC voltage levels on the HDMI link are within the specified limits for each TMDS signal.
Pass Limits:[200 mV to 600 mV]VSwing332 mV

Result Details:

Result Details
HDMIAutomationConfigTiming 97_30_420

Next

HF1-4: Intra-Pair Skew - Clock Reference: Test ID HF1-4

Test Summary: Pass Test Description: Confirm that any skew within any one differential data pair in the TMDS portion of the HDMI link does not exceed the limits in the specification.
Pass Limits:[-150 mTbit to 150 mTbit]Clock Intra-Pair Skew-27 mTbit

Result Details:

Result Details
HDMIAutomationConfigTiming 97Max skew (ps)26.690Min skew (ps)-37.170Mean skew (ps)-4.595Std Dev (ps)8.928Clk+ threshold (V)3.074Clk- threshold (V)3.066Acquisition Bandwidth (GHz)13.000NumEdges19.071000 kTest Frequency(MHz)148.500Clock Intra-Pair Skew(ps)-6.670Intra-Pair Skew Distribution(See image)

Trial 1

Trial 1: Intra-Pair Skew Distribution

HF1-7: Differential Clock Voltage Swing, Vs (TP1) Reference: Test ID HF1-7

Test Summary: Pass Test Description: This is a subset of the clock jitter test where the differential voltage swing at TP1 must be > 400mV and < 1200mV.
Pass Limits:(400 mV to 1.200 V)Clock Differential Voltage Swing, Vs 852 mV

Result Details:

Result Details
HDMIAutomationConfigTiming 97

Trial 1

Trial 1: Clock Differential Voltage Swing, Vs

HF1-7: Clock Jitter (TP2_EQ with Worst Case Positive Skew) Reference: Test ID HF1-7

Test Summary: Pass Test Description: 2 Channels Connection Model: TMDS differential clock jitter must not exceed 0.3*Tbit, relative to the ideal Recovery Clock. For compliance, the DUT should output > 340MHz for testing.
Pass Limits:<= 300 mTbitClock Jitter220 mTbit

Result Details:

Result Details
HDMIAutomationConfigTiming 97Test Frequency(MHz)148.500Total Jitter with Zoomed Out Screen(See image)Std Dev(ps)5.627Tbit(ps)168.350Clock Jitter(ps)37.110# Samples16.000000000 M# Edges0.000Acquisition Bandwidth (GHz)13.000Transfer Function FileC:\ProgramData\Keysight\Infiniium\Apps\HDMIHEACTest\app\config\TransferFunction\Final\Final_WorstCableModel_HDMIEquFile7M_skew_p_112.tf4

Trial 1

Trial 1: Total Jitter with Zoomed Out Screen

Trial 1: Clock Jitter

HF1-7: Clock Jitter (TP2_EQ with Worst Case Negative Skew) Reference: Test ID HF1-7

Result Details:

Result Details
HDMIAutomationConfigTiming 97Test Frequency(MHz)148.500Total Jitter with Zoomed Out Screen(See image)Std Dev(ps)5.827Tbit(ps)168.350Clock Jitter(ps)37.790# Samples16.000000000 M# Edges0.000Acquisition Bandwidth (GHz)13.000Transfer Function FileC:\ProgramData\Keysight\Infiniium\Apps\HDMIHEACTest\app\config\TransferFunction\Final\Final_WorstCableModel_HDMIEquFile7M_skew_n_112.tf4

Trial 1

Trial 1: Total Jitter with Zoomed Out Screen

Trial 1: Clock Jitter

HF1-5: D0 Maximum Differential Voltage Reference: Test ID HF1-5

Test Summary: Pass Test Description: Confirm that the differential signal on each TMDS differential data pair does not exceed Maximum/Minimum Differential Voltage.
Pass Limits:<= 780 mMaximum Differential Voltage519 m

Result Details:

Result Details
HDMIAutomationConfigTiming 97_30_420Eye Width(ps)226.860Eye Height(mV)492.000Data Lane AD0Test Frequency(MHz)92.813Mask Moved(ps)0.000# Acquisitions Point16.000000000 MTbit(ps)269.359RightJitterData(Tbit)158 mLeftJitterData(Tbit)158 mRightJitterData(ps)42.510LeftJitterData(ps)42.510Maximum MarginNALeft MarginNARight MarginNAMaximum Margin (Vertical)NAUpper Margin (Vertical)NALower Margin (Vertical)NADifferential Swing Voltage, VH(V)485 mDifferential Swing Voltage,VL (V)-418 mDifferential Swing Voltage(V)903 mAcquisition Bandwidth (GHz)13.000

Trial 1

Trial 1: Maximum Differential Voltage

HF1-5: D0 Minimum Differential Voltage Reference: Test ID HF1-5

Result Details:

Result Details
HDMIAutomationConfigTiming 97_30_420

Trial 1

Trial 1: Minimum Differential Voltage

HF1-2: D0 Rise Time Reference: Test ID HF1-2

Test Summary: Pass Test Description: The transition time is defined as the time interval between the normalized 20% and 80% amplitude levels. For compliance, the DUT should output the highest supported pixel clock frequency during the test.
Pass Limits:>= 42.500 psTransition Time69.360 ps

Result Details:

Result Details
HDMIAutomationConfigTiming 97Test Frequency(MHz)148.500Data Lane AD0Edge TypeAll edgesUpper Threshold(%)80.000Lower Threshold(%)20.000VTop(V)472 mVBase(V)-416 mUpper Threshold(V)294 mLower Threshold(V)-238 m#Edge475.713000 kAcquisition Bandwidth (GHz)13.000Transfer Function FileNA

Trial 1

Trial 1: Transition Time

HF1-2: D0 Fall Time Reference: Test ID HF1-2

Result Details:

Result Details
HDMIAutomationConfigTiming 97Test Frequency(MHz)148.500Data Lane AD0Edge TypeAll edgesUpper Threshold(%)80.000Lower Threshold(%)20.000VTop(V)472 mVBase(V)-416 mUpper Threshold(V)294 mLower Threshold(V)-238 m#Edge475.712000 kAcquisition Bandwidth (GHz)13.000Transfer Function FileNA

Trial 1

Trial 1: Transition Time

HF1-1: VL D0+ Reference: Test ID HF1-1

Test Summary: Pass Test Description: Confirm that the DC voltage levels on the HDMI link are within the specified limits for each TMDS signal.
Pass Limits:[2.300 V to 2.900 V]VL2.632 V

Result Details:

Result Details
HDMIAutomationConfigTiming 97_30_420Test Frequency92.813 MHz# Edges,VL119.250000 k# Edges,VH119.336000 kVH3.052 VVL(See image)VH(See image)

Trial 1

Trial 1: VL

Trial 1: VH

HF1-1: D0+ VSwing Reference: Test ID HF1-1

Test Summary: Pass Test Description: Confirm that the DC voltage levels on the HDMI link are within the specified limits for each TMDS signal.
Pass Limits:[400 mV to 600 mV]VSwing420 mV

Result Details:

Result Details
HDMIAutomationConfigTiming 97_30_420

Next

HF1-1: VL D0- Reference: Test ID HF1-1

Test Summary: Pass Test Description: Confirm that the DC voltage levels on the HDMI link are within the specified limits for each TMDS signal.
Pass Limits:[2.300 V to 2.900 V]VL2.616 V

Result Details:

Result Details
HDMIAutomationConfigTiming 97_30_420Test Frequency92.813 MHz# Edges,VL118.853000 k# Edges,VH119.435000 kVH3.040 VVL(See image)VH(See image)

Trial 1

Trial 1: VL

Trial 1: VH

HF1-1: D0- VSwing Reference: Test ID HF1-1

Test Summary: Pass Test Description: Confirm that the DC voltage levels on the HDMI link are within the specified limits for each TMDS signal.
Pass Limits:[400 mV to 600 mV]VSwing424 mV

Result Details:

Result Details
HDMIAutomationConfigTiming 97_30_420

Next

HF1-4: Intra-Pair Skew - Data Lane 0 Reference: Test ID HF1-4

Result Details:

Result Details
HDMIAutomationConfigTiming 97Max skew (ps)16.960Min skew (ps)-16.660Mean skew (ps)1.927Std Dev (ps)4.103D+ threshold (V)2.614D- threshold (V)2.585Acquisition Bandwidth (GHz)13.000NumEdges13.466000 kTest Frequency(MHz)148.500Data Intra-Pair Skew(ps)2.440Intra-Pair Skew Distribution(See image)Transfer Function FileNA

Trial 1

Trial 1: Intra-Pair Skew Distribution

HF1-8: D0 Mask Test (TP2_EQ with Worst Case Positive Skew) Reference: Test ID HF1-8

Test Summary: Pass Test Description: Confirm that the differential signal on each TMDS differential data pair has an “eye opening” (region of valid data) that meets or exceeds the limits on eye opening in the specification.
Pass Limits:No Mask FailuresTotal # failures0.000

Result Details:

Result Details
HDMIAutomationConfigTiming 97Eye Width(ps)94.440Eye Height(mV)289.000Data Lane AD0Test Frequency(MHz)148.500Mask Moved(ps)0.000# Acquisitions Point16.000000000 MTbit(ps)168.350RightJitterData(Tbit)439 mLeftJitterData(Tbit)439 mRightJitterData(ps)73.920LeftJitterData(ps)73.920Maximum MarginNALeft MarginNARight MarginNAMaximum Margin (Vertical)NAUpper Margin (Vertical)NALower Margin (Vertical)NADifferential Swing Voltage, VH(V)473 mDifferential Swing Voltage,VL (V)-419 mDifferential Swing Voltage(V)892 mAcquisition Bandwidth (GHz)13.000Transfer Function FileC:\ProgramData\Keysight\Infiniium\Apps\HDMIHEACTest\app\config\TransferFunction\Final\Final_WorstCableModel_HDMIEquFile7M_skew_p_112.tf4

Trial 1

Trial 1: Total # failures

HF1-8: D0 Mask Test (TP2_EQ with Worst Case Negative Skew) Reference: Test ID HF1-8

Result Details:

Result Details
HDMIAutomationConfigTiming 97Eye Width(ps)94.690Eye Height(mV)296.000Data Lane AD0Test Frequency(MHz)148.500Mask Moved(ps)0.000# Acquisitions Point16.000000000 MTbit(ps)168.350RightJitterData(Tbit)437 mLeftJitterData(Tbit)437 mRightJitterData(ps)73.650LeftJitterData(ps)73.650Maximum MarginNALeft MarginNARight MarginNAMaximum Margin (Vertical)NAUpper Margin (Vertical)NALower Margin (Vertical)NADifferential Swing Voltage, VH(V)467 mDifferential Swing Voltage,VL (V)-425 mDifferential Swing Voltage(V)892 mAcquisition Bandwidth (GHz)13.000Transfer Function FileC:\ProgramData\Keysight\Infiniium\Apps\HDMIHEACTest\app\config\TransferFunction\Final\Final_WorstCableModel_HDMIEquFile7M_skew_n_112.tf4

Trial 1

Trial 1: Total # failures

HF1-5: D1 Maximum Differential Voltage Reference: Test ID HF1-5

Result Details:

Result Details
HDMIAutomationConfigTiming 97_30_420Eye Width(ps)224.750Eye Height(mV)500.000Data Lane AD1Test Frequency(MHz)92.813Mask Moved(ps)0.000# Acquisitions Point16.000000000 MTbit(ps)269.361RightJitterData(Tbit)166 mLeftJitterData(Tbit)166 mRightJitterData(ps)44.610LeftJitterData(ps)44.610Maximum MarginNALeft MarginNARight MarginNAMaximum Margin (Vertical)NAUpper Margin (Vertical)NALower Margin (Vertical)NADifferential Swing Voltage, VH(V)481 mDifferential Swing Voltage,VL (V)-413 mDifferential Swing Voltage(V)894 mAcquisition Bandwidth (GHz)13.000

Trial 1

Trial 1: Maximum Differential Voltage

HF1-5: D1 Minimum Differential Voltage Reference: Test ID HF1-5

Result Details:

Result Details
HDMIAutomationConfigTiming 97_30_420

Trial 1

Trial 1: Minimum Differential Voltage

HF1-2: D1 Rise Time Reference: Test ID HF1-2

Result Details:

Result Details
HDMIAutomationConfigTiming 97Test Frequency(MHz)148.055Data Lane AD1Edge TypeAll edgesUpper Threshold(%)80.000Lower Threshold(%)20.000VTop(V)475 mVBase(V)-423 mUpper Threshold(V)295 mLower Threshold(V)-243 m#Edge474.869000 kAcquisition Bandwidth (GHz)13.000Transfer Function FileNA

Trial 1

Trial 1: Transition Time

HF1-2: D1 Fall Time Reference: Test ID HF1-2

Result Details:

Trial 1

Trial 1: Transition Time

HF1-1: VL D1+ Reference: Test ID HF1-1

Test Summary: Pass Test Description: Confirm that the DC voltage levels on the HDMI link are within the specified limits for each TMDS signal.
Pass Limits:[2.300 V to 2.900 V]VL2.629 V

Result Details:

Result Details
HDMIAutomationConfigTiming 97_30_420Test Frequency92.813 MHz# Edges,VL119.190000 k# Edges,VH119.223000 kVH3.049 VVL(See image)VH(See image)

Trial 1

Trial 1: VL

Trial 1: VH

HF1-1: D1+ VSwing Reference: Test ID HF1-1

Test Summary: Pass Test Description: Confirm that the DC voltage levels on the HDMI link are within the specified limits for each TMDS signal.
Pass Limits:[400 mV to 600 mV]VSwing420 mV

Result Details:

Result Details
HDMIAutomationConfigTiming 97_30_420

Next

HF1-1: VL D1- Reference: Test ID HF1-1

Test Summary: Pass Test Description: Confirm that the DC voltage levels on the HDMI link are within the specified limits for each TMDS signal.
Pass Limits:[2.300 V to 2.900 V]VL2.636 V

Result Details:

Result Details
HDMIAutomationConfigTiming 97_30_420Test Frequency92.813 MHz# Edges,VL119.283000 k# Edges,VH119.354000 kVH3.051 VVL(See image)VH(See image)

Trial 1

Trial 1: VL

Trial 1: VH

HF1-1: D1- VSwing Reference: Test ID HF1-1

Test Summary: Pass Test Description: Confirm that the DC voltage levels on the HDMI link are within the specified limits for each TMDS signal.
Pass Limits:[400 mV to 600 mV]VSwing415 mV

Result Details:

Result Details
HDMIAutomationConfigTiming 97_30_420

Next

HF1-4: Intra-Pair Skew - Data Lane 1 Reference: Test ID HF1-4

Result Details:

Result Details
HDMIAutomationConfigTiming 97Max skew (ps)18.050Min skew (ps)-12.800Mean skew (ps)3.485Std Dev (ps)4.172D+ threshold (V)2.613D- threshold (V)2.585Acquisition Bandwidth (GHz)13.000NumEdges13.753000 kTest Frequency(MHz)148.055Data Intra-Pair Skew(ps)2.730Intra-Pair Skew Distribution(See image)

Trial 1

Trial 1: Intra-Pair Skew Distribution

HF1-8: D1 Mask Test (TP2_EQ with Worst Case Positive Skew) Reference: Test ID HF1-8

Result Details:

Result Details
HDMIAutomationConfigTiming 97Eye Width(ps)93.140Eye Height(mV)287.000Data Lane AD1Test Frequency(MHz)148.055Mask Moved(ps)0.000# Acquisitions Point16.000000000 MTbit(ps)168.349RightJitterData(Tbit)447 mLeftJitterData(Tbit)447 mRightJitterData(ps)75.190LeftJitterData(ps)75.190Maximum MarginNALeft MarginNARight MarginNAMaximum Margin (Vertical)NAUpper Margin (Vertical)NALower Margin (Vertical)NADifferential Swing Voltage, VH(V)469 mDifferential Swing Voltage,VL (V)-419 mDifferential Swing Voltage(V)888 mAcquisition Bandwidth (GHz)13.000Transfer Function FileC:\ProgramData\Keysight\Infiniium\Apps\HDMIHEACTest\app\config\TransferFunction\Final\Final_WorstCableModel_HDMIEquFile7M_skew_p_112.tf4

Trial 1

Trial 1: Total # failures

HF1-8: D1 Mask Test (TP2_EQ with Worst Case Negative Skew) Reference: Test ID HF1-8

Result Details:

Result Details
HDMIAutomationConfigTiming 97Eye Width(ps)86.010Eye Height(mV)262.000Data Lane AD1Test Frequency(MHz)148.055Mask Moved(ps)0.000# Acquisitions Point16.000000000 MTbit(ps)168.350RightJitterData(Tbit)489 mLeftJitterData(Tbit)489 mRightJitterData(ps)82.320LeftJitterData(ps)82.320Maximum MarginNALeft MarginNARight MarginNAMaximum Margin (Vertical)NAUpper Margin (Vertical)NALower Margin (Vertical)NADifferential Swing Voltage, VH(V)467 mDifferential Swing Voltage,VL (V)-425 mDifferential Swing Voltage(V)892 mAcquisition Bandwidth (GHz)13.000Transfer Function FileC:\ProgramData\Keysight\Infiniium\Apps\HDMIHEACTest\app\config\TransferFunction\Final\Final_WorstCableModel_HDMIEquFile7M_skew_n_112.tf4

Trial 1

Trial 1: Total # failures

HF1-5: D2 Maximum Differential Voltage Reference: Test ID HF1-5

Result Details:

Result Details
HDMIAutomationConfigTiming 97_30_420Eye Width(ps)221.380Eye Height(mV)531.000Data Lane AD2Test Frequency(MHz)92.813Mask Moved(ps)0.000# Acquisitions Point16.000000000 MTbit(ps)269.362RightJitterData(Tbit)178 mLeftJitterData(Tbit)178 mRightJitterData(ps)47.980LeftJitterData(ps)47.980Maximum MarginNALeft MarginNARight MarginNAMaximum Margin (Vertical)NAUpper Margin (Vertical)NALower Margin (Vertical)NADifferential Swing Voltage, VH(V)494 mDifferential Swing Voltage,VL (V)-430 mDifferential Swing Voltage(V)924 mAcquisition Bandwidth (GHz)13.000

Trial 1

Trial 1: Maximum Differential Voltage

HF1-5: D2 Minimum Differential Voltage Reference: Test ID HF1-5

Result Details:

Result Details
HDMIAutomationConfigTiming 97_30_420

Trial 1

Trial 1: Minimum Differential Voltage

HF1-2: D2 Rise Time Reference: Test ID HF1-2

Test Summary: Pass Test Description: Confirm that the rise times and fall times on the TMDS differential signals fall within the limits of the specification.
Pass Limits:>= 42.500 psTransition Time73.381 ps

Result Details:

Result Details
HDMIAutomationConfigTiming 97Test Frequency(MHz)148.280Data Lane AD2Edge TypeAll edgesUpper Threshold(%)80.000Lower Threshold(%)20.000VTop(V)457 mVBase(V)-398 mUpper Threshold(V)286 mLower Threshold(V)-227 m#Edge475.405000 kAcquisition Bandwidth (GHz)13.000Transfer Function FileNA

Trial 1

Trial 1: Transition Time

HF1-2: D2 Fall Time Reference: Test ID HF1-2

Result Details:

Result Details
HDMIAutomationConfigTiming 97Test Frequency(MHz)148.280Data Lane AD2Edge TypeAll edgesUpper Threshold(%)80.000Lower Threshold(%)20.000VTop(V)457 mVBase(V)-398 mUpper Threshold(V)286 mLower Threshold(V)-227 m#Edge475.406000 kAcquisition Bandwidth (GHz)13.000Transfer Function FileNA

Trial 1

Trial 1: Transition Time

HF1-1: VL D2+ Reference: Test ID HF1-1

Test Summary: Pass Test Description: Confirm that the DC voltage levels on the HDMI link are within the specified limits for each TMDS signal.
Pass Limits:[2.300 V to 2.900 V]VL2.596 V

Result Details:

Result Details
HDMIAutomationConfigTiming 97_30_420Test Frequency92.813 MHz# Edges,VL119.253000 k# Edges,VH119.182000 kVH3.056 VVL(See image)VH(See image)

Trial 1

Trial 1: VL

Trial 1: VH

HF1-1: D2+ VSwing Reference: Test ID HF1-1

Test Summary: Pass Test Description: Confirm that the DC voltage levels on the HDMI link are within the specified limits for each TMDS signal.
Pass Limits:[400 mV to 600 mV]VSwing459 mV

Result Details:

Result Details
HDMIAutomationConfigTiming 97_30_420

Next

HF1-1: VL D2- Reference: Test ID HF1-1

Test Summary: Pass Test Description: Confirm that the DC voltage levels on the HDMI link are within the specified limits for each TMDS signal.
Pass Limits:[2.300 V to 2.900 V]VL2.613 V

Result Details:

Result Details
HDMIAutomationConfigTiming 97_30_420Test Frequency92.813 MHz# Edges,VL119.319000 k# Edges,VH118.942000 kVH3.044 VVL(See image)VH(See image)

Trial 1

Trial 1: VL

Trial 1: VH

HF1-1: D2- VSwing Reference: Test ID HF1-1

Test Summary: Pass Test Description: Confirm that the DC voltage levels on the HDMI link are within the specified limits for each TMDS signal.
Pass Limits:[400 mV to 600 mV]VSwing431 mV

Result Details:

Result Details
HDMIAutomationConfigTiming 97_30_420

Next

HF1-4: Intra-Pair Skew - Data Lane 2 Reference: Test ID HF1-4

Result Details:

Result Details
HDMIAutomationConfigTiming 97Max skew (ps)16.730Min skew (ps)-19.580Mean skew (ps)-883 mStd Dev (ps)5.435D+ threshold (V)2.637D- threshold (V)2.610Acquisition Bandwidth (GHz)13.000NumEdges11.886000 kTest Frequency(MHz)147.687Data Intra-Pair Skew(ps)-2.300Intra-Pair Skew Distribution(See image)

Trial 1

Trial 1: Intra-Pair Skew Distribution

HF1-8: D2 Mask Test (TP2_EQ with Worst Case Postive Skew) Reference: Test ID HF1-8

Result Details:

Result Details
HDMIAutomationConfigTiming 97Eye Width(ps)94.040Eye Height(mV)288.000Data Lane AD2Test Frequency(MHz)148.280Mask Moved(ps)0.000# Acquisitions Point16.000000000 MTbit(ps)168.350RightJitterData(Tbit)441 mLeftJitterData(Tbit)441 mRightJitterData(ps)74.290LeftJitterData(ps)74.290Maximum MarginNALeft MarginNARight MarginNAMaximum Margin (Vertical)NAUpper Margin (Vertical)NALower Margin (Vertical)NADifferential Swing Voltage, VH(V)454 mDifferential Swing Voltage,VL (V)-401 mDifferential Swing Voltage(V)855 mAcquisition Bandwidth (GHz)13.000Transfer Function FileC:\ProgramData\Keysight\Infiniium\Apps\HDMIHEACTest\app\config\TransferFunction\Final\Final_WorstCableModel_HDMIEquFile7M_skew_p_112.tf4

Trial 1

Trial 1: Total # failures

HF1-8: D2 Mask Test (TP2_EQ with Worst Case Negative Skew) Reference: Test ID HF1-8

Result Details:

Result Details
HDMIAutomationConfigTiming 97Eye Width(ps)95.900Eye Height(mV)292.000Data Lane AD2Test Frequency(MHz)148.280Mask Moved(ps)0.000# Acquisitions Point16.000000000 MTbit(ps)168.351RightJitterData(Tbit)430 mLeftJitterData(Tbit)430 mRightJitterData(ps)72.450LeftJitterData(ps)72.450Maximum MarginNALeft MarginNARight MarginNAMaximum Margin (Vertical)NAUpper Margin (Vertical)NALower Margin (Vertical)NADifferential Swing Voltage, VH(V)443 mDifferential Swing Voltage,VL (V)-408 mDifferential Swing Voltage(V)851 mAcquisition Bandwidth (GHz)13.000Transfer Function FileC:\ProgramData\Keysight\Infiniium\Apps\HDMIHEACTest\app\config\TransferFunction\Final\Final_WorstCableModel_HDMIEquFile7M_skew_n_112.tf4

Trial 1

Trial 1: Total # failures

HF1-3: Inter-Pair Skew - D0/D1 Reference: Test ID HF1-3

Test Summary: Pass Test Description: Confirm that any skew between the differential data pairs in the TMDS portion of the HDMI link does not exceed the limits in the specification.
Pass Limits:[-200 mTpixel to 200 mTpixel]Data - Data Inter-Pair Skew8 mTpixel

Result Details:

Result Details
HDMIAutomationConfigTiming 97Test Frequency(MHz)148.341Data Lane AD0Data Lane BD1Data - Data Inter-Pair Skew(ps)13.622Triggered Pattern(no value)Transfer Function FileNA

Trial 1

Trial 1: Data - Data Inter-Pair Skew

HF1-3: Inter-Pair Skew - D0/D2 Reference: Test ID HF1-3

Result Details:

Result Details
HDMIAutomationConfigTiming 97Test Frequency(MHz)148.232Data Lane AD0Data Lane BD2Data - Data Inter-Pair Skew(ps)-10.077Triggered Pattern(no value)Transfer Function FileNA

Trial 1

Trial 1: Data - Data Inter-Pair Skew

HF1-3: Inter-Pair Skew - D1/D2 Reference: Test ID HF1-3

Result Details:

Result Details
HDMIAutomationConfigTiming 97Test Frequency(MHz)146.086Data Lane AD1Data Lane BD2Data - Data Inter-Pair Skew(ps)-13.975Triggered Pattern(no value)Transfer Function FileNA

Trial 1

Trial 1: Data - Data Inter-Pair Skew

Test Configuration Details
Device Description
Device ID	Transmitter
Device Name	Device1
Fixture Type	Wilder HDMI2 TPA-P 12 inch
Probe Connection	4 Probes
Probe Head Type	N5380A/B
Lane Connection	1 Data Lane
HDMI Specification	2.0
HDMI Test Type	TMDS Physical Layer Tests
Test Session Details
Infiniium SW Version	06.30.01102
Infiniium Model Number	DSO91304A
Infiniium Serial Number	MY48240287
Application SW Version	2.21
Debug Mode Used	No
Probe (Channel 1)	Model: 1169A Serial: US49412364 Head: N5380A/B Atten: Calibrated (7 NOV 2019 01:44:45), Using Cal Atten (2.0060E+00) Skew: Calibrated (7 NOV 2019 01:51:03), Using Cal Skew
Probe (Channel 2)	Model: 1169A Serial: US54031008 Head: N5380A/B Atten: Calibrated (27 SEP 2019 23:22:31), Using Cal Atten (2.0742E+00) Skew: Calibrated (27 SEP 2019 23:22:51), Using Cal Skew
Probe (Channel 3)	Model: 1169A Serial: US53270632 Head: N5380A/B Atten: Calibrated (7 NOV 2019 01:49:59), Using Cal Atten (2.0456E+00) Skew: Calibrated (7 NOV 2019 01:50:33), Using Cal Skew
Probe (Channel 4)	Model: 1169A Serial: US48470515 Head: N5380A/B Atten: Calibrated (27 SEP 2019 22:57:59), Using Cal Atten (2.1153E+00) Skew: Calibrated (27 SEP 2019 22:58:16), Using Cal Skew
Last Test Date	2019-11-20 03:47:42 UTC -07:00

Test Statistics
Failed	0
Passed	49
Total	49

Margin Thresholds
Warning	< 2 %
Critical	< 0 %

Pass	# Failed	# Trials	Test Name	Worst Actual	Worst Margin	Pass Limits
	0	1	HF1-2: Clock Rise Time	197.275 ps	163.0 %	VALUE >= 75.000 ps
	0	1	HF1-2: Clock Fall Time	215.831 ps	187.8 %	VALUE >= 75.000 ps
	0	2	HF1-6: Clock Duty Cycle(Minimum)	49.780	24.5 %	>=40%
	0	2	HF1-6: Clock Duty Cycle(Maximum)	50.540	15.8 %	<=60%
	0	2	HF1-6: Clock Rate	148.500100000 MHz	2.3 %	85.000000000 MHz <= VALUE <= 150.000000000 MHz
	0	1	HF1-1: VL Clock +	2.962 V	17.3 %	2.300 V <= VALUE <= 3.100 V
	0	1	HF1-1:Clock + VSwing	336 mV	34.0 %	200 mV <= VALUE <= 600 mV
	0	1	HF1-1: VL Clock -	2.972 V	16.0 %	2.300 V <= VALUE <= 3.100 V
	0	1	HF1-1:Clock - VSwing	332 mV	33.0 %	200 mV <= VALUE <= 600 mV
	0	1	HF1-4: Intra-Pair Skew - Clock	-27 mTbit	41.0 %	-150 mTbit <= VALUE <= 150 mTbit
	0	1	HF1-7: Differential Clock Voltage Swing, Vs (TP1)	852 mV	43.5 %	400 mV < VALUE < 1.200 V
	0	1	HF1-7: Clock Jitter (TP2_EQ with Worst Case Positive Skew)	220 mTbit	26.7 %	VALUE <= 300 mTbit
	0	1	HF1-7: Clock Jitter (TP2_EQ with Worst Case Negative Skew)	224 mTbit	25.3 %	VALUE <= 300 mTbit
	0	1	HF1-5: D0 Maximum Differential Voltage	519 m	33.5 %	VALUE <= 780 m
	0	1	HF1-5: D0 Minimum Differential Voltage	-519 m	33.5 %	VALUE >= -780 m
	0	1	HF1-2: D0 Rise Time	69.360 ps	63.2 %	VALUE >= 42.500 ps
	0	1	HF1-2: D0 Fall Time	68.029 ps	60.1 %	VALUE >= 42.500 ps
	0	1	HF1-1: VL D0+	2.632 V	44.7 %	2.300 V <= VALUE <= 2.900 V
	0	1	HF1-1: D0+ VSwing	420 mV	10.0 %	400 mV <= VALUE <= 600 mV
	0	1	HF1-1: VL D0-	2.616 V	47.3 %	2.300 V <= VALUE <= 2.900 V
	0	1	HF1-1: D0- VSwing	424 mV	12.0 %	400 mV <= VALUE <= 600 mV
	0	1	HF1-4: Intra-Pair Skew - Data Lane 0	11 mTbit	46.3 %	-150 mTbit <= VALUE <= 150 mTbit
	0	1	HF1-8: D0 Mask Test (TP2_EQ with Worst Case Positive Skew)	0.000	50.0 %	No Mask Failures
	0	1	HF1-8: D0 Mask Test (TP2_EQ with Worst Case Negative Skew)	0.000	50.0 %	No Mask Failures
	0	1	HF1-5: D1 Maximum Differential Voltage	527 m	32.4 %	VALUE <= 780 m
	0	1	HF1-5: D1 Minimum Differential Voltage	-527 m	32.4 %	VALUE >= -780 m
	0	1	HF1-2: D1 Rise Time	67.957 ps	59.9 %	VALUE >= 42.500 ps
	0	1	HF1-2: D1 Fall Time	68.983 ps	62.3 %	VALUE >= 42.500 ps
	0	1	HF1-1: VL D1+	2.629 V	45.2 %	2.300 V <= VALUE <= 2.900 V
	0	1	HF1-1: D1+ VSwing	420 mV	10.0 %	400 mV <= VALUE <= 600 mV
	0	1	HF1-1: VL D1-	2.636 V	44.0 %	2.300 V <= VALUE <= 2.900 V
	0	1	HF1-1: D1- VSwing	415 mV	7.5 %	400 mV <= VALUE <= 600 mV
	0	1	HF1-4: Intra-Pair Skew - Data Lane 1	21 mTbit	43.0 %	-150 mTbit <= VALUE <= 150 mTbit
	0	1	HF1-8: D1 Mask Test (TP2_EQ with Worst Case Positive Skew)	0.000	50.0 %	No Mask Failures
	0	1	HF1-8: D1 Mask Test (TP2_EQ with Worst Case Negative Skew)	0.000	50.0 %	No Mask Failures
	0	1	HF1-5: D2 Maximum Differential Voltage	534 m	31.5 %	VALUE <= 780 m
	0	1	HF1-5: D2 Minimum Differential Voltage	-544 m	30.3 %	VALUE >= -780 m
	0	1	HF1-2: D2 Rise Time	73.381 ps	72.7 %	VALUE >= 42.500 ps
	0	1	HF1-2: D2 Fall Time	71.800 ps	68.9 %	VALUE >= 42.500 ps
	0	1	HF1-1: VL D2+	2.596 V	49.3 %	2.300 V <= VALUE <= 2.900 V
	0	1	HF1-1: D2+ VSwing	459 mV	29.5 %	400 mV <= VALUE <= 600 mV
	0	1	HF1-1: VL D2-	2.613 V	47.8 %	2.300 V <= VALUE <= 2.900 V
	0	1	HF1-1: D2- VSwing	431 mV	15.5 %	400 mV <= VALUE <= 600 mV
	0	1	HF1-4: Intra-Pair Skew - Data Lane 2	-5 mTbit	48.3 %	-150 mTbit <= VALUE <= 150 mTbit
	0	1	HF1-8: D2 Mask Test (TP2_EQ with Worst Case Postive Skew)	0.000	50.0 %	No Mask Failures
	0	1	HF1-8: D2 Mask Test (TP2_EQ with Worst Case Negative Skew)	0.000	50.0 %	No Mask Failures
	0	1	HF1-3: Inter-Pair Skew - D0/D1	8 mTpixel	48.0 %	-200 mTpixel <= VALUE <= 200 mTpixel
	0	1	HF1-3: Inter-Pair Skew - D0/D2	-6 mTpixel	48.5 %	-200 mTpixel <= VALUE <= 200 mTpixel
	0	1	HF1-3: Inter-Pair Skew - D1/D2	-8 mTpixel	48.0 %	-200 mTpixel <= VALUE <= 200 mTpixel

Summary of Results

Report Detail