Test Report

Overall Result: PASS

Test Configuration Details
Device Description
Device ID
Transmitter
Device Name
Device1
Fixture Type
Wilder HDMI2 TPA-P 12 inch
Probe Connection
4 Probes
Probe Head Type
N5380A/B
Lane Connection
1 Data Lane
HDMI Specification
2.0
HDMI Test Type
TMDS Physical Layer Tests
Test Session Details
Infiniium SW Version
06.30.01102
Infiniium Model Number
DSO91304A
Infiniium Serial Number
MY48240287
Application SW Version
2.21
Debug Mode Used
No
Probe (Channel 1)
Model: 1169A
Serial: US49412364
Head: N5380A/B
Atten: Calibrated (4 JUN 2019 14:31:02), Using Cal Atten (2.0328E+00)
Skew: Calibrated (4 JUN 2019 14:31:17), Using Cal Skew
Probe (Channel 2)
Model: 1169A
Serial: US54031008
Head: N5380A/B
Atten: Calibrated (4 JUN 2019 14:32:01), Using Cal Atten (2.0733E+00)
Skew: Calibrated (4 JUN 2019 14:32:13), Using Cal Skew
Probe (Channel 3)
Model: 1169A
Serial: US53270632
Head: N5380A/B
Atten: Calibrated (4 JUN 2019 14:33:01), Using Cal Atten (2.0553E+00)
Skew: Calibrated (4 JUN 2019 14:33:12), Using Cal Skew
Probe (Channel 4)
Model: 1169A
Serial: US48470515
Head: N5380A/B
Atten: Calibrated (4 JUN 2019 14:33:49), Using Cal Atten (2.1284E+00)
Skew: Calibrated (4 JUN 2019 14:33:59), Using Cal Skew
Last Test Date
2019-06-10 18:41:30 UTC -06:00

Summary of Results

Test Statistics
Failed0
Passed49
Total49

Margin Thresholds
Warning< 2 %
Critical< 0 %

Pass# Failed# TrialsTest NameActual ValueMarginPass Limits
01HF1-2: Clock Rise Time110.634 ps47.5 % VALUE >= 75.000 ps
01HF1-2: Clock Fall Time107.462 ps43.3 % VALUE >= 75.000 ps
01HF1-6: Clock Duty Cycle(Minimum)49.78024.5 % >=40%
01HF1-6: Clock Duty Cycle(Maximum)50.32016.1 % <=60%
01HF1-6: Clock Rate148.351500000 MHz2.5 % 85.000000000 MHz <= VALUE <= 150.000000000 MHz
01HF1-1: VL Clock +2.660 V45.0 % 2.300 V <= VALUE <= 3.100 V
01HF1-1:Clock + VSwing325 mV31.3 % 200 mV <= VALUE <= 600 mV
01HF1-1: VL Clock -2.674 V46.8 % 2.300 V <= VALUE <= 3.100 V
01HF1-1:Clock - VSwing322 mV30.5 % 200 mV <= VALUE <= 600 mV
01HF1-4: Intra-Pair Skew - Clock55 mTbit31.7 % -150 mTbit <= VALUE <= 150 mTbit
01HF1-7: Differential Clock Voltage Swing, Vs (TP1)631 mV28.9 % 400 mV < VALUE < 1.200 V
01HF1-7: Clock Jitter (TP2_EQ with Worst Case Positive Skew)198 mTbit34.0 % VALUE <= 300 mTbit
01HF1-7: Clock Jitter (TP2_EQ with Worst Case Negative Skew)201 mTbit33.0 % VALUE <= 300 mTbit
01HF1-5: D0 Maximum Differential Voltage550 m29.5 % VALUE <= 780 m
01HF1-5: D0 Minimum Differential Voltage-549 m29.6 % VALUE >= -780 m
01HF1-2: D0 Rise Time113.998 ps168.2 % VALUE >= 42.500 ps
01HF1-2: D0 Fall Time111.016 ps161.2 % VALUE >= 42.500 ps
01HF1-1: VL D0+2.437 V22.8 % 2.300 V <= VALUE <= 2.900 V
01HF1-1: D0+ VSwing427 mV13.5 % 400 mV <= VALUE <= 600 mV
01HF1-1: VL D0-2.425 V20.8 % 2.300 V <= VALUE <= 2.900 V
01HF1-1: D0- VSwing448 mV24.0 % 400 mV <= VALUE <= 600 mV
01HF1-4: Intra-Pair Skew - Data Lane 0-67 mTbit27.7 % -150 mTbit <= VALUE <= 150 mTbit
01HF1-8: D0 Mask Test (TP2_EQ with Worst Case Positive Skew)0.00050.0 % No Mask Failures
01HF1-8: D0 Mask Test (TP2_EQ with Worst Case Negative Skew)0.00050.0 % No Mask Failures
01HF1-5: D1 Maximum Differential Voltage577 m26.0 % VALUE <= 780 m
01HF1-5: D1 Minimum Differential Voltage-568 m27.2 % VALUE >= -780 m
01HF1-2: D1 Rise Time111.165 ps161.6 % VALUE >= 42.500 ps
01HF1-2: D1 Fall Time109.609 ps157.9 % VALUE >= 42.500 ps
01HF1-1: VL D1+2.435 V22.5 % 2.300 V <= VALUE <= 2.900 V
01HF1-1: D1+ VSwing425 mV12.0 % 400 mV <= VALUE <= 600 mV
01HF1-1: VL D1-2.417 V19.5 % 2.300 V <= VALUE <= 2.900 V
01HF1-1: D1- VSwing455 mV27.5 % 400 mV <= VALUE <= 600 mV
01HF1-4: Intra-Pair Skew - Data Lane 1-76 mTbit24.7 % -150 mTbit <= VALUE <= 150 mTbit
01HF1-8: D1 Mask Test (TP2_EQ with Worst Case Positive Skew)0.00050.0 % No Mask Failures
01HF1-8: D1 Mask Test (TP2_EQ with Worst Case Negative Skew)0.00050.0 % No Mask Failures
01HF1-5: D2 Maximum Differential Voltage571 m26.8 % VALUE <= 780 m
01HF1-5: D2 Minimum Differential Voltage-556 m28.7 % VALUE >= -780 m
01HF1-2: D2 Rise Time117.372 ps176.2 % VALUE >= 42.500 ps
01HF1-2: D2 Fall Time114.434 ps169.3 % VALUE >= 42.500 ps
01HF1-1: VL D2+2.419 V19.8 % 2.300 V <= VALUE <= 2.900 V
01HF1-1: D2+ VSwing458 mV29.0 % 400 mV <= VALUE <= 600 mV
01HF1-1: VL D2-2.421 V20.2 % 2.300 V <= VALUE <= 2.900 V
01HF1-1: D2- VSwing445 mV22.5 % 400 mV <= VALUE <= 600 mV
01HF1-4: Intra-Pair Skew - Data Lane 2-96 mTbit18.0 % -150 mTbit <= VALUE <= 150 mTbit
01HF1-8: D2 Mask Test (TP2_EQ with Worst Case Postive Skew)0.00050.0 % No Mask Failures
01HF1-8: D2 Mask Test (TP2_EQ with Worst Case Negative Skew)0.00050.0 % No Mask Failures
01HF1-3: Inter-Pair Skew - D0/D11 mTpixel49.8 % -200 mTpixel <= VALUE <= 200 mTpixel
01HF1-3: Inter-Pair Skew - D0/D27 mTpixel48.3 % -200 mTpixel <= VALUE <= 200 mTpixel
01HF1-3: Inter-Pair Skew - D1/D26 mTpixel48.5 % -200 mTpixel <= VALUE <= 200 mTpixel


Report Detail

 Next
HF1-2: Clock Rise Time Reference: Test ID HF1-2
Test Summary: Pass Test Description: 2 Channels Connection Model: The transition time is defined as the time interval between the normalized 20% and 80% amplitude levels. For compliance, the DUT should output the highest supported pixel clock frequency during the test.
Pass Limits:>= 75.000 psRaw Clock Transition Time110.634 ps
Result Details:
Result Details
HDMIAutomationConfigTiming 97Test Frequency(MHz)148.352Upper Threshold(%)80.000Lower Threshold(%)20.000VTop(V)320 mVBase(V)-312 mUpper Threshold(V)193 mLower Threshold(V)-185 m# Edges59.341000 kAcquisition Bandwidth (GHz)13.000
Trial 1
Trial 1: Raw Clock Transition Time

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HF1-2: Clock Fall Time Reference: Test ID HF1-2
Test Summary: Pass Test Description: 2 Channels Connection Model: The transition time is defined as the time interval between the normalized 20% and 80% amplitude levels. For compliance, the DUT should output the highest supported pixel clock frequency during the test.
Pass Limits:>= 75.000 psRaw Clock Transition Time107.462 ps
Result Details:
Result Details
HDMIAutomationConfigTiming 97Test Frequency(MHz)148.352Upper Threshold(%)80.000Lower Threshold(%)20.000VTop(V)320 mVBase(V)-312 mUpper Threshold(V)193 mLower Threshold(V)-185 m# Edges59.340000 kAcquisition Bandwidth (GHz)13.000
Trial 1
Trial 1: Raw Clock Transition Time

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HF1-6: Clock Duty Cycle(Minimum) Reference: Test ID HF1-6
Test Summary: Pass Test Description: Confirm that the duty cycle of the differential TMDS clock does not exceed the limits allowed by the specification. For compliance, the DUT should output the highest supported pixel clock frequency during the test.
Pass Limits:>=40%Clock Duty Cycle Minimum49.780
Result Details:
Result Details
HDMIAutomationConfigTiming 97Test Frequency(MHz)148.352# Edges10.000000 kTdutyMIN(ns)3.355
Trial 1
Trial 1: Clock Duty Cycle Minimum

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HF1-6: Clock Duty Cycle(Maximum) Reference: Test ID HF1-6
Test Summary: Pass Test Description: Confirm that the duty cycle of the differential TMDS clock does not exceed the limits allowed by the specification. For compliance, the DUT should output the highest supported pixel clock frequency during the test.
Pass Limits:<=60%Clock Duty Cycle Maximum50.320
Result Details:
Result Details
HDMIAutomationConfigTiming 97Test Frequency(MHz)148.352# Edges10.000000 kTdutyMAX(ns)3.392
Trial 1
Trial 1: Clock Duty Cycle Maximum

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HF1-6: Clock Rate Reference: Test ID HF1-6
Test Summary: Pass Test Description: Confirm that the duty cycle of the differential TMDS clock does not exceed the limits allowed by the specification. For compliance, the DUT should output the highest supported pixel clock frequency during the test.
Pass Limits:[85.000000000 MHz to 150.000000000 MHz]Clock Rate148.351500000 MHz
Result Details:
Result Details
HDMIAutomationConfigTiming 97

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HF1-1: VL Clock + Reference: Test ID HF1-1
Test Summary: Pass Test Description: Confirm that the DC voltage levels on the HDMI link are within the specified limits for each TMDS signal.
Pass Limits:[2.300 V to 3.100 V]VL2.660 V
Result Details:
Result Details
HDMIAutomationConfigTiming 97Test Frequency148.352 MHz# Edges59.151000 kVH2.985 VVL(See image)VH(See image)
Trial 1
Trial 1: VL
Trial 1: VH

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HF1-1:Clock + VSwing Reference: Test ID HF1-1
Test Summary: Pass Test Description: Confirm that the DC voltage levels on the HDMI link are within the specified limits for each TMDS signal.
Pass Limits:[200 mV to 600 mV]VSwing325 mV
Result Details:
Result Details
HDMIAutomationConfigTiming 97

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HF1-1: VL Clock - Reference: Test ID HF1-1
Test Summary: Pass Test Description: Confirm that the DC voltage levels on the HDMI link are within the specified limits for each TMDS signal.
Pass Limits:[2.300 V to 3.100 V]VL2.674 V
Result Details:
Result Details
HDMIAutomationConfigTiming 97Test Frequency148.352 MHz# Edges59.152000 kVH2.996 VVL(See image)VH(See image)
Trial 1
Trial 1: VL
Trial 1: VH

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HF1-1:Clock - VSwing Reference: Test ID HF1-1
Test Summary: Pass Test Description: Confirm that the DC voltage levels on the HDMI link are within the specified limits for each TMDS signal.
Pass Limits:[200 mV to 600 mV]VSwing322 mV
Result Details:
Result Details
HDMIAutomationConfigTiming 97

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HF1-4: Intra-Pair Skew - Clock Reference: Test ID HF1-4
Test Summary: Pass Test Description: Confirm that any skew within any one differential data pair in the TMDS portion of the HDMI link does not exceed the limits in the specification.
Pass Limits:[-150 mTbit to 150 mTbit]Clock Intra-Pair Skew55 mTbit
Result Details:
Result Details
HDMIAutomationConfigTiming 97Max skew (ps)40.030Min skew (ps)-23.350Mean skew (ps)9.260Std Dev (ps)10.705Clk+ threshold (V)2.823Clk- threshold (V)2.821Acquisition Bandwidth (GHz)13.000NumEdges11.669000 kTest Frequency(MHz)148.352Clock Intra-Pair Skew(ps)19.060Intra-Pair Skew Distribution(See image)
Trial 1
Trial 1: Intra-Pair Skew Distribution

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HF1-7: Differential Clock Voltage Swing, Vs (TP1) Reference: Test ID HF1-7
Test Summary: Pass Test Description: This is a subset of the clock jitter test where the differential voltage swing at TP1 must be > 400mV and < 1200mV.
Pass Limits:(400 mV to 1.200 V)Clock Differential Voltage Swing, Vs 631 mV
Result Details:
Result Details
HDMIAutomationConfigTiming 97
Trial 1
Trial 1: Clock Differential Voltage Swing, Vs

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HF1-7: Clock Jitter (TP2_EQ with Worst Case Positive Skew) Reference: Test ID HF1-7
Test Summary: Pass Test Description: 2 Channels Connection Model: TMDS differential clock jitter must not exceed 0.3*Tbit, relative to the ideal Recovery Clock. For compliance, the DUT should output > 340MHz for testing.
Pass Limits:<= 300 mTbitClock Jitter198 mTbit
Result Details:
Result Details
HDMIAutomationConfigTiming 97Test Frequency(MHz)148.352Total Jitter with Zoomed Out Screen(See image)Std Dev(ps)4.834Tbit(ps)168.519Clock Jitter(ps)33.370# Samples16.000000000 M# Edges0.000Acquisition Bandwidth (GHz)13.000Transfer Function FileC:\ProgramData\Keysight\Infiniium\Apps\HDMIHEACTest\app\config\TransferFunction\Final\Final_WorstCableModel_HDMIEquFile7M_skew_p_112.tf4
Trial 1
Trial 1: Total Jitter with Zoomed Out Screen
Trial 1: Clock Jitter

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HF1-7: Clock Jitter (TP2_EQ with Worst Case Negative Skew) Reference: Test ID HF1-7
Test Summary: Pass Test Description: 2 Channels Connection Model: TMDS differential clock jitter must not exceed 0.3*Tbit, relative to the ideal Recovery Clock. For compliance, the DUT should output > 340MHz for testing.
Pass Limits:<= 300 mTbitClock Jitter201 mTbit
Result Details:
Result Details
HDMIAutomationConfigTiming 97Test Frequency(MHz)148.352Total Jitter with Zoomed Out Screen(See image)Std Dev(ps)4.936Tbit(ps)168.519Clock Jitter(ps)33.940# Samples16.000000000 M# Edges0.000Acquisition Bandwidth (GHz)13.000Transfer Function FileC:\ProgramData\Keysight\Infiniium\Apps\HDMIHEACTest\app\config\TransferFunction\Final\Final_WorstCableModel_HDMIEquFile7M_skew_n_112.tf4
Trial 1
Trial 1: Total Jitter with Zoomed Out Screen
Trial 1: Clock Jitter

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HF1-5: D0 Maximum Differential Voltage Reference: Test ID HF1-5
Test Summary: Pass Test Description: Confirm that the differential signal on each TMDS differential data pair does not exceed Maximum/Minimum Differential Voltage.
Pass Limits:<= 780 mMaximum Differential Voltage550 m
Result Details:
Result Details
HDMIAutomationConfigTiming 97Eye Width(ps)126.400Eye Height(mV)432.000Data Lane AD0Test Frequency(MHz)148.352Mask Moved(ps)0.000# Acquisitions Point16.000000000 MTbit(ps)168.519RightJitterData(Tbit)250 mLeftJitterData(Tbit)250 mRightJitterData(ps)42.130LeftJitterData(ps)42.130Maximum MarginNALeft MarginNARight MarginNAMaximum Margin (Vertical)NAUpper Margin (Vertical)NALower Margin (Vertical)NADifferential Swing Voltage, VH(V)480 mDifferential Swing Voltage,VL (V)-418 mDifferential Swing Voltage(V)898 mAcquisition Bandwidth (GHz)13.000
Trial 1
Trial 1: Maximum Differential Voltage

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HF1-5: D0 Minimum Differential Voltage Reference: Test ID HF1-5
Test Summary: Pass Test Description: Confirm that the differential signal on each TMDS differential data pair does not exceed Maximum/Minimum Differential Voltage.
Pass Limits:>= -780 mMinimum Differential Voltage-549 m
Result Details:
Result Details
HDMIAutomationConfigTiming 97
Trial 1
Trial 1: Minimum Differential Voltage

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HF1-2: D0 Rise Time Reference: Test ID HF1-2
Test Summary: Pass Test Description: The transition time is defined as the time interval between the normalized 20% and 80% amplitude levels. For compliance, the DUT should output the highest supported pixel clock frequency during the test.
Pass Limits:>= 42.500 psTransition Time113.998 ps
Result Details:
Result Details
HDMIAutomationConfigTiming 97Test Frequency(MHz)148.352Data Lane AD0Edge TypeAll edgesUpper Threshold(%)80.000Lower Threshold(%)20.000VTop(V)480 mVBase(V)-418 mUpper Threshold(V)300 mLower Threshold(V)-238 m#Edge421.759000 kAcquisition Bandwidth (GHz)13.000Transfer Function FileNA
Trial 1
Trial 1: Transition Time

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HF1-2: D0 Fall Time Reference: Test ID HF1-2
Test Summary: Pass Test Description: The transition time is defined as the time interval between the normalized 20% and 80% amplitude levels. For compliance, the DUT should output the highest supported pixel clock frequency during the test.
Pass Limits:>= 42.500 psTransition Time111.016 ps
Result Details:
Result Details
HDMIAutomationConfigTiming 97Test Frequency(MHz)148.352Data Lane AD0Edge TypeAll edgesUpper Threshold(%)80.000Lower Threshold(%)20.000VTop(V)480 mVBase(V)-418 mUpper Threshold(V)300 mLower Threshold(V)-238 m#Edge421.758000 kAcquisition Bandwidth (GHz)13.000Transfer Function FileNA
Trial 1
Trial 1: Transition Time

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HF1-1: VL D0+ Reference: Test ID HF1-1
Test Summary: Pass Test Description: Confirm that the DC voltage levels on the HDMI link are within the specified limits for each TMDS signal.
Pass Limits:[2.300 V to 2.900 V]VL2.437 V
Result Details:
Result Details
HDMIAutomationConfigTiming 97Test Frequency148.352 MHz# Edges,VL185.398000 k# Edges,VH186.450000 kVH2.864 VVL(See image)VH(See image)
Trial 1
Trial 1: VL
Trial 1: VH

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HF1-1: D0+ VSwing Reference: Test ID HF1-1
Test Summary: Pass Test Description: Confirm that the DC voltage levels on the HDMI link are within the specified limits for each TMDS signal.
Pass Limits:[400 mV to 600 mV]VSwing427 mV
Result Details:
Result Details
HDMIAutomationConfigTiming 97

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HF1-1: VL D0- Reference: Test ID HF1-1
Test Summary: Pass Test Description: Confirm that the DC voltage levels on the HDMI link are within the specified limits for each TMDS signal.
Pass Limits:[2.300 V to 2.900 V]VL2.425 V
Result Details:
Result Details
HDMIAutomationConfigTiming 97Test Frequency148.352 MHz# Edges,VL186.141000 k# Edges,VH185.360000 kVH2.872 VVL(See image)VH(See image)
Trial 1
Trial 1: VL
Trial 1: VH

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HF1-1: D0- VSwing Reference: Test ID HF1-1
Test Summary: Pass Test Description: Confirm that the DC voltage levels on the HDMI link are within the specified limits for each TMDS signal.
Pass Limits:[400 mV to 600 mV]VSwing448 mV
Result Details:
Result Details
HDMIAutomationConfigTiming 97

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HF1-4: Intra-Pair Skew - Data Lane 0 Reference: Test ID HF1-4
Test Summary: Pass Test Description: Confirm that any skew within any one differential data pair in the TMDS portion of the HDMI link does not exceed the limits in the specification.
Pass Limits:[-150 mTbit to 150 mTbit]Data Intra-Pair Skew-67 mTbit
Result Details:
Result Details
HDMIAutomationConfigTiming 97Max skew (ps)37.580Min skew (ps)-49.970Mean skew (ps)-11.290Std Dev (ps)12.247D+ threshold (V)2.667D- threshold (V)2.639Acquisition Bandwidth (GHz)13.000NumEdges18.901000 kTest Frequency(MHz)148.352Data Intra-Pair Skew(ps)-13.200Intra-Pair Skew Distribution(See image)Transfer Function FileNA
Trial 1
Trial 1: Intra-Pair Skew Distribution

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HF1-8: D0 Mask Test (TP2_EQ with Worst Case Positive Skew) Reference: Test ID HF1-8
Test Summary: Pass Test Description: Confirm that the differential signal on each TMDS differential data pair has an “eye opening” (region of valid data) that meets or exceeds the limits on eye opening in the specification.
Pass Limits:No Mask FailuresTotal # failures0.000
Result Details:
Result Details
HDMIAutomationConfigTiming 97Eye Width(ps)102.700Eye Height(mV)250.000Data Lane AD0Test Frequency(MHz)148.352Mask Moved(ps)0.000# Acquisitions Point16.000000000 MTbit(ps)168.519RightJitterData(Tbit)391 mLeftJitterData(Tbit)391 mRightJitterData(ps)65.830LeftJitterData(ps)65.830Maximum MarginNALeft MarginNARight MarginNAMaximum Margin (Vertical)NAUpper Margin (Vertical)NALower Margin (Vertical)NADifferential Swing Voltage, VH(V)485 mDifferential Swing Voltage,VL (V)-423 mDifferential Swing Voltage(V)908 mAcquisition Bandwidth (GHz)13.000Transfer Function FileC:\ProgramData\Keysight\Infiniium\Apps\HDMIHEACTest\app\config\TransferFunction\Final\Final_WorstCableModel_HDMIEquFile7M_skew_p_112.tf4
Trial 1
Trial 1: Total # failures

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HF1-8: D0 Mask Test (TP2_EQ with Worst Case Negative Skew) Reference: Test ID HF1-8
Test Summary: Pass Test Description: Confirm that the differential signal on each TMDS differential data pair has an “eye opening” (region of valid data) that meets or exceeds the limits on eye opening in the specification.
Pass Limits:No Mask FailuresTotal # failures0.000
Result Details:
Result Details
HDMIAutomationConfigTiming 97Eye Width(ps)105.320Eye Height(mV)231.000Data Lane AD0Test Frequency(MHz)148.352Mask Moved(ps)0.000# Acquisitions Point16.000000000 MTbit(ps)168.518RightJitterData(Tbit)375 mLeftJitterData(Tbit)375 mRightJitterData(ps)63.200LeftJitterData(ps)63.200Maximum MarginNALeft MarginNARight MarginNAMaximum Margin (Vertical)NAUpper Margin (Vertical)NALower Margin (Vertical)NADifferential Swing Voltage, VH(V)480 mDifferential Swing Voltage,VL (V)-425 mDifferential Swing Voltage(V)905 mAcquisition Bandwidth (GHz)13.000Transfer Function FileC:\ProgramData\Keysight\Infiniium\Apps\HDMIHEACTest\app\config\TransferFunction\Final\Final_WorstCableModel_HDMIEquFile7M_skew_n_112.tf4
Trial 1
Trial 1: Total # failures

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HF1-5: D1 Maximum Differential Voltage Reference: Test ID HF1-5
Test Summary: Pass Test Description: Confirm that the differential signal on each TMDS differential data pair does not exceed Maximum/Minimum Differential Voltage.
Pass Limits:<= 780 mMaximum Differential Voltage577 m
Result Details:
Result Details
HDMIAutomationConfigTiming 97Eye Width(ps)112.170Eye Height(mV)414.000Data Lane AD1Test Frequency(MHz)148.352Mask Moved(ps)0.000# Acquisitions Point16.000000000 MTbit(ps)168.520RightJitterData(Tbit)336 mLeftJitterData(Tbit)334 mRightJitterData(ps)56.610LeftJitterData(ps)56.350Maximum MarginNALeft MarginNARight MarginNAMaximum Margin (Vertical)NAUpper Margin (Vertical)NALower Margin (Vertical)NADifferential Swing Voltage, VH(V)484 mDifferential Swing Voltage,VL (V)-418 mDifferential Swing Voltage(V)902 mAcquisition Bandwidth (GHz)13.000
Trial 1
Trial 1: Maximum Differential Voltage

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HF1-5: D1 Minimum Differential Voltage Reference: Test ID HF1-5
Test Summary: Pass Test Description: Confirm that the differential signal on each TMDS differential data pair does not exceed Maximum/Minimum Differential Voltage.
Pass Limits:>= -780 mMinimum Differential Voltage-568 m
Result Details:
Result Details
HDMIAutomationConfigTiming 97
Trial 1
Trial 1: Minimum Differential Voltage

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HF1-2: D1 Rise Time Reference: Test ID HF1-2
Test Summary: Pass Test Description: The transition time is defined as the time interval between the normalized 20% and 80% amplitude levels. For compliance, the DUT should output the highest supported pixel clock frequency during the test.
Pass Limits:>= 42.500 psTransition Time111.165 ps
Result Details:
Result Details
HDMIAutomationConfigTiming 97Test Frequency(MHz)148.352Data Lane AD1Edge TypeAll edgesUpper Threshold(%)80.000Lower Threshold(%)20.000VTop(V)484 mVBase(V)-418 mUpper Threshold(V)304 mLower Threshold(V)-238 m#Edge418.494000 kAcquisition Bandwidth (GHz)13.000Transfer Function FileNA
Trial 1
Trial 1: Transition Time

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HF1-2: D1 Fall Time Reference: Test ID HF1-2
Test Summary: Pass Test Description: The transition time is defined as the time interval between the normalized 20% and 80% amplitude levels. For compliance, the DUT should output the highest supported pixel clock frequency during the test.
Pass Limits:>= 42.500 psTransition Time109.609 ps
Result Details:
Result Details
HDMIAutomationConfigTiming 97Test Frequency(MHz)148.352Data Lane AD1Edge TypeAll edgesUpper Threshold(%)80.000Lower Threshold(%)20.000VTop(V)484 mVBase(V)-418 mUpper Threshold(V)304 mLower Threshold(V)-238 m#Edge418.494000 kAcquisition Bandwidth (GHz)13.000Transfer Function FileNA
Trial 1
Trial 1: Transition Time

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HF1-1: VL D1+ Reference: Test ID HF1-1
Test Summary: Pass Test Description: Confirm that the DC voltage levels on the HDMI link are within the specified limits for each TMDS signal.
Pass Limits:[2.300 V to 2.900 V]VL2.435 V
Result Details:
Result Details
HDMIAutomationConfigTiming 97Test Frequency148.352 MHz# Edges,VL185.355000 k# Edges,VH186.247000 kVH2.860 VVL(See image)VH(See image)
Trial 1
Trial 1: VL
Trial 1: VH

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HF1-1: D1+ VSwing Reference: Test ID HF1-1
Test Summary: Pass Test Description: Confirm that the DC voltage levels on the HDMI link are within the specified limits for each TMDS signal.
Pass Limits:[400 mV to 600 mV]VSwing425 mV
Result Details:
Result Details
HDMIAutomationConfigTiming 97

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HF1-1: VL D1- Reference: Test ID HF1-1
Test Summary: Pass Test Description: Confirm that the DC voltage levels on the HDMI link are within the specified limits for each TMDS signal.
Pass Limits:[2.300 V to 2.900 V]VL2.417 V
Result Details:
Result Details
HDMIAutomationConfigTiming 97Test Frequency148.352 MHz# Edges,VL186.547000 k# Edges,VH185.542000 kVH2.871 VVL(See image)VH(See image)
Trial 1
Trial 1: VL
Trial 1: VH

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HF1-1: D1- VSwing Reference: Test ID HF1-1
Test Summary: Pass Test Description: Confirm that the DC voltage levels on the HDMI link are within the specified limits for each TMDS signal.
Pass Limits:[400 mV to 600 mV]VSwing455 mV
Result Details:
Result Details
HDMIAutomationConfigTiming 97

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HF1-4: Intra-Pair Skew - Data Lane 1 Reference: Test ID HF1-4
Test Summary: Pass Test Description: Confirm that any skew within any one differential data pair in the TMDS portion of the HDMI link does not exceed the limits in the specification.
Pass Limits:[-150 mTbit to 150 mTbit]Data Intra-Pair Skew-76 mTbit
Result Details:
Result Details
HDMIAutomationConfigTiming 97Max skew (ps)49.460Min skew (ps)-64.590Mean skew (ps)-12.749Std Dev (ps)15.102D+ threshold (V)2.665D- threshold (V)2.633Acquisition Bandwidth (GHz)13.000NumEdges19.433000 kTest Frequency(MHz)148.352Data Intra-Pair Skew(ps)-15.230Intra-Pair Skew Distribution(See image)
Trial 1
Trial 1: Intra-Pair Skew Distribution

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HF1-8: D1 Mask Test (TP2_EQ with Worst Case Positive Skew) Reference: Test ID HF1-8
Test Summary: Pass Test Description: Confirm that the differential signal on each TMDS differential data pair has an “eye opening” (region of valid data) that meets or exceeds the limits on eye opening in the specification.
Pass Limits:No Mask FailuresTotal # failures0.000
Result Details:
Result Details
HDMIAutomationConfigTiming 97Eye Width(ps)106.640Eye Height(mV)223.000Data Lane AD1Test Frequency(MHz)148.352Mask Moved(ps)0.000# Acquisitions Point16.000000000 MTbit(ps)168.519RightJitterData(Tbit)367 mLeftJitterData(Tbit)367 mRightJitterData(ps)61.880LeftJitterData(ps)61.880Maximum MarginNALeft MarginNARight MarginNAMaximum Margin (Vertical)NAUpper Margin (Vertical)NALower Margin (Vertical)NADifferential Swing Voltage, VH(V)472 mDifferential Swing Voltage,VL (V)-422 mDifferential Swing Voltage(V)894 mAcquisition Bandwidth (GHz)13.000Transfer Function FileC:\ProgramData\Keysight\Infiniium\Apps\HDMIHEACTest\app\config\TransferFunction\Final\Final_WorstCableModel_HDMIEquFile7M_skew_p_112.tf4
Trial 1
Trial 1: Total # failures

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HF1-8: D1 Mask Test (TP2_EQ with Worst Case Negative Skew) Reference: Test ID HF1-8
Test Summary: Pass Test Description: Confirm that the differential signal on each TMDS differential data pair has an “eye opening” (region of valid data) that meets or exceeds the limits on eye opening in the specification.
Pass Limits:No Mask FailuresTotal # failures0.000
Result Details:
Result Details
HDMIAutomationConfigTiming 97Eye Width(ps)99.000Eye Height(mV)200.000Data Lane AD1Test Frequency(MHz)148.352Mask Moved(ps)0.000# Acquisitions Point16.000000000 MTbit(ps)168.519RightJitterData(Tbit)412 mLeftJitterData(Tbit)412 mRightJitterData(ps)69.510LeftJitterData(ps)69.510Maximum MarginNALeft MarginNARight MarginNAMaximum Margin (Vertical)NAUpper Margin (Vertical)NALower Margin (Vertical)NADifferential Swing Voltage, VH(V)480 mDifferential Swing Voltage,VL (V)-426 mDifferential Swing Voltage(V)906 mAcquisition Bandwidth (GHz)13.000Transfer Function FileC:\ProgramData\Keysight\Infiniium\Apps\HDMIHEACTest\app\config\TransferFunction\Final\Final_WorstCableModel_HDMIEquFile7M_skew_n_112.tf4
Trial 1
Trial 1: Total # failures

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HF1-5: D2 Maximum Differential Voltage Reference: Test ID HF1-5
Test Summary: Pass Test Description: Confirm that the differential signal on each TMDS differential data pair does not exceed Maximum/Minimum Differential Voltage.
Pass Limits:<= 780 mMaximum Differential Voltage571 m
Result Details:
Result Details
HDMIAutomationConfigTiming 97Eye Width(ps)123.500Eye Height(mV)420.000Data Lane AD2Test Frequency(MHz)148.352Mask Moved(ps)0.000# Acquisitions Point16.000000000 MTbit(ps)168.518RightJitterData(Tbit)267 mLeftJitterData(Tbit)267 mRightJitterData(ps)45.030LeftJitterData(ps)45.030Maximum MarginNALeft MarginNARight MarginNAMaximum Margin (Vertical)NAUpper Margin (Vertical)NALower Margin (Vertical)NADifferential Swing Voltage, VH(V)492 mDifferential Swing Voltage,VL (V)-425 mDifferential Swing Voltage(V)917 mAcquisition Bandwidth (GHz)13.000
Trial 1
Trial 1: Maximum Differential Voltage

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HF1-5: D2 Minimum Differential Voltage Reference: Test ID HF1-5
Test Summary: Pass Test Description: Confirm that the differential signal on each TMDS differential data pair does not exceed Maximum/Minimum Differential Voltage.
Pass Limits:>= -780 mMinimum Differential Voltage-556 m
Result Details:
Result Details
HDMIAutomationConfigTiming 97
Trial 1
Trial 1: Minimum Differential Voltage

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HF1-2: D2 Rise Time Reference: Test ID HF1-2
Test Summary: Pass Test Description: Confirm that the rise times and fall times on the TMDS differential signals fall within the limits of the specification.
Pass Limits:>= 42.500 psTransition Time117.372 ps
Result Details:
Result Details
HDMIAutomationConfigTiming 97Test Frequency(MHz)148.352Data Lane AD2Edge TypeAll edgesUpper Threshold(%)80.000Lower Threshold(%)20.000VTop(V)492 mVBase(V)-425 mUpper Threshold(V)309 mLower Threshold(V)-242 m#Edge383.287000 kAcquisition Bandwidth (GHz)13.000Transfer Function FileNA
Trial 1
Trial 1: Transition Time

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HF1-2: D2 Fall Time Reference: Test ID HF1-2
Test Summary: Pass Test Description: Confirm that the rise times and fall times on the TMDS differential signals fall within the limits of the specification.
Pass Limits:>= 42.500 psTransition Time114.434 ps
Result Details:
Result Details
HDMIAutomationConfigTiming 97Test Frequency(MHz)148.352Data Lane AD2Edge TypeAll edgesUpper Threshold(%)80.000Lower Threshold(%)20.000VTop(V)492 mVBase(V)-425 mUpper Threshold(V)309 mLower Threshold(V)-242 m#Edge383.286000 kAcquisition Bandwidth (GHz)13.000Transfer Function FileNA
Trial 1
Trial 1: Transition Time

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HF1-1: VL D2+ Reference: Test ID HF1-1
Test Summary: Pass Test Description: Confirm that the DC voltage levels on the HDMI link are within the specified limits for each TMDS signal.
Pass Limits:[2.300 V to 2.900 V]VL2.419 V
Result Details:
Result Details
HDMIAutomationConfigTiming 97Test Frequency148.352 MHz# Edges,VL185.311000 k# Edges,VH186.031000 kVH2.876 VVL(See image)VH(See image)
Trial 1
Trial 1: VL
Trial 1: VH

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HF1-1: D2+ VSwing Reference: Test ID HF1-1
Test Summary: Pass Test Description: Confirm that the DC voltage levels on the HDMI link are within the specified limits for each TMDS signal.
Pass Limits:[400 mV to 600 mV]VSwing458 mV
Result Details:
Result Details
HDMIAutomationConfigTiming 97

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HF1-1: VL D2- Reference: Test ID HF1-1
Test Summary: Pass Test Description: Confirm that the DC voltage levels on the HDMI link are within the specified limits for each TMDS signal.
Pass Limits:[2.300 V to 2.900 V]VL2.421 V
Result Details:
Result Details
HDMIAutomationConfigTiming 97Test Frequency148.352 MHz# Edges,VL186.316000 k# Edges,VH185.528000 kVH2.866 VVL(See image)VH(See image)
Trial 1
Trial 1: VL
Trial 1: VH

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HF1-1: D2- VSwing Reference: Test ID HF1-1
Test Summary: Pass Test Description: Confirm that the DC voltage levels on the HDMI link are within the specified limits for each TMDS signal.
Pass Limits:[400 mV to 600 mV]VSwing445 mV
Result Details:
Result Details
HDMIAutomationConfigTiming 97

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HF1-4: Intra-Pair Skew - Data Lane 2 Reference: Test ID HF1-4
Test Summary: Pass Test Description: Confirm that any skew within any one differential data pair in the TMDS portion of the HDMI link does not exceed the limits in the specification.
Pass Limits:[-150 mTbit to 150 mTbit]Data Intra-Pair Skew-96 mTbit
Result Details:
Result Details
HDMIAutomationConfigTiming 97Max skew (ps)32.700Min skew (ps)-54.440Mean skew (ps)-16.190Std Dev (ps)11.702D+ threshold (V)2.660D- threshold (V)2.633Acquisition Bandwidth (GHz)13.000NumEdges18.045000 kTest Frequency(MHz)148.352Data Intra-Pair Skew(ps)-18.690Intra-Pair Skew Distribution(See image)
Trial 1
Trial 1: Intra-Pair Skew Distribution

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HF1-8: D2 Mask Test (TP2_EQ with Worst Case Postive Skew) Reference: Test ID HF1-8
Test Summary: Pass Test Description: Confirm that the differential signal on each TMDS differential data pair has an “eye opening” (region of valid data) that meets or exceeds the limits on eye opening in the specification.
Pass Limits:No Mask FailuresTotal # failures0.000
Result Details:
Result Details
HDMIAutomationConfigTiming 97Eye Width(ps)102.690Eye Height(mV)239.000Data Lane AD2Test Frequency(MHz)148.352Mask Moved(ps)0.000# Acquisitions Point16.000000000 MTbit(ps)168.519RightJitterData(Tbit)391 mLeftJitterData(Tbit)389 mRightJitterData(ps)65.830LeftJitterData(ps)65.560Maximum MarginNALeft MarginNARight MarginNAMaximum Margin (Vertical)NAUpper Margin (Vertical)NALower Margin (Vertical)NADifferential Swing Voltage, VH(V)495 mDifferential Swing Voltage,VL (V)-438 mDifferential Swing Voltage(V)933 mAcquisition Bandwidth (GHz)13.000Transfer Function FileC:\ProgramData\Keysight\Infiniium\Apps\HDMIHEACTest\app\config\TransferFunction\Final\Final_WorstCableModel_HDMIEquFile7M_skew_p_112.tf4
Trial 1
Trial 1: Total # failures

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HF1-8: D2 Mask Test (TP2_EQ with Worst Case Negative Skew) Reference: Test ID HF1-8
Test Summary: Pass Test Description: Confirm that the differential signal on each TMDS differential data pair has an “eye opening” (region of valid data) that meets or exceeds the limits on eye opening in the specification.
Pass Limits:No Mask FailuresTotal # failures0.000
Result Details:
Result Details
HDMIAutomationConfigTiming 97Eye Width(ps)107.170Eye Height(mV)238.000Data Lane AD2Test Frequency(MHz)148.352Mask Moved(ps)0.000# Acquisitions Point16.000000000 MTbit(ps)168.518RightJitterData(Tbit)364 mLeftJitterData(Tbit)363 mRightJitterData(ps)61.350LeftJitterData(ps)61.090Maximum MarginNALeft MarginNARight MarginNAMaximum Margin (Vertical)NAUpper Margin (Vertical)NALower Margin (Vertical)NADifferential Swing Voltage, VH(V)486 mDifferential Swing Voltage,VL (V)-433 mDifferential Swing Voltage(V)919 mAcquisition Bandwidth (GHz)13.000Transfer Function FileC:\ProgramData\Keysight\Infiniium\Apps\HDMIHEACTest\app\config\TransferFunction\Final\Final_WorstCableModel_HDMIEquFile7M_skew_n_112.tf4
Trial 1
Trial 1: Total # failures

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HF1-3: Inter-Pair Skew - D0/D1 Reference: Test ID HF1-3
Test Summary: Pass Test Description: Confirm that any skew between the differential data pairs in the TMDS portion of the HDMI link does not exceed the limits in the specification.
Pass Limits:[-200 mTpixel to 200 mTpixel]Data - Data Inter-Pair Skew1 mTpixel
Result Details:
Result Details
HDMIAutomationConfigTiming 97Test Frequency(MHz)147.123Data Lane AD0Data Lane BD1Data - Data Inter-Pair Skew(ps)2.106Triggered Pattern(no value)Transfer Function FileNA
Trial 1
Trial 1: Data - Data Inter-Pair Skew

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HF1-3: Inter-Pair Skew - D0/D2 Reference: Test ID HF1-3
Test Summary: Pass Test Description: Confirm that any skew between the differential data pairs in the TMDS portion of the HDMI link does not exceed the limits in the specification.
Pass Limits:[-200 mTpixel to 200 mTpixel]Data - Data Inter-Pair Skew7 mTpixel
Result Details:
Result Details
HDMIAutomationConfigTiming 97Test Frequency(MHz)147.738Data Lane AD0Data Lane BD2Data - Data Inter-Pair Skew(ps)11.810Triggered Pattern(no value)Transfer Function FileNA
Trial 1
Trial 1: Data - Data Inter-Pair Skew

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HF1-3: Inter-Pair Skew - D1/D2 Reference: Test ID HF1-3
Test Summary: Pass Test Description: Confirm that any skew between the differential data pairs in the TMDS portion of the HDMI link does not exceed the limits in the specification.
Pass Limits:[-200 mTpixel to 200 mTpixel]Data - Data Inter-Pair Skew6 mTpixel
Result Details:
Result Details
HDMIAutomationConfigTiming 97Test Frequency(MHz)147.510Data Lane AD1Data Lane BD2Data - Data Inter-Pair Skew(ps)10.145Triggered Pattern(no value)Transfer Function FileNA
Trial 1
Trial 1: Data - Data Inter-Pair Skew

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